Skip to main content
CS Colloquium | November 1, 2018

Survey of Semiconductor Test and Quality

Matthias Kamm
Apple

Stevenson Hall 1300
12:00 PM - 12:50 PM

As Moore’s Law continues to progress, it ensures finer geometries, billion transistor designs and increasing complexity. To ensure SoC devices meet customer expectations for quality and reliability a thorough test strategy is required. Companies designing and manufacturing semiconductor SoCs must optimize requirements in different areas such as test time, coverage, yield and cost. Baseline requirements can vary based on the target markets, but general expectations for quality are increasing with every generation of computing device. Topics include semiconductor design, test, quality, reliability, and future technologies being researched by the industry.